por_rni_aux_ctl_u_rni_nid0 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)
Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_rni_aux_ctl_u_rni_nid0 (CPM4_CMN600) Register Description

Register Namepor_rni_aux_ctl_u_rni_nid0
Relative Address0x0000010A08
Absolute Address 0x00FC010A08 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000002
DescriptionFunctions as the auxiliary control register for RN-I.

por_rni_aux_ctl_u_rni_nid0 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:6razRead as zero0x0reserved
sameid_wrstash_stream_en 5rwNormal read/write0x0Enables streaming of same-ID WrUniqStash
upstrm_datcheck_en 4rwNormal read/write0x0Upstream supports Datacheck
dis_norm_rdstream 3rwNormal read/write0x0Disables streaming of same ARID normal memory reads to different address
park_port_arb_ptr 2rwNormal read/write0x0Parks the AXI port arbitration pointer for Burst
ar_byp_en 1rwNormal read/write0x1AR bypass enable; enables bypass path in the AR pipeline
cg_disable 0rwNormal read/write0x0Disables clock gating when set