por_rni_s0_port_control_u_rni_nid0 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_rni_s0_port_control_u_rni_nid0 (CPM4_CMN600) Register Description

Register Namepor_rni_s0_port_control_u_rni_nid0
Relative Address0x0000010A10
Absolute Address 0x00FC010A10 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionControls port S0 AXI/ACE slave interface settings.

por_rni_s0_port_control_u_rni_nid0 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:11razRead as zero0x0reserved
s0_lpid_mask10:0rwNormal read/write0x0Port S0 LPID mask LPID[0]: Equal to the result of UnaryOR of BitwiseAND of LPID mask and AXID (LPID[0] = |(AXID & mask)); specifies which AXID bit is reflected in the LSB of LPID LPID[2:1]: Equal to port ID[1:0]; the MSB of LPID contains port ID