por_rni_s2_qos_lat_scale_u_rni_nid0 (CPM4_CMN600) Register

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2023-08-29
Revision
1.3

por_rni_s2_qos_lat_scale_u_rni_nid0 (CPM4_CMN600) Register Description

Register Namepor_rni_s2_qos_lat_scale_u_rni_nid0
Relative Address0x0000010AD0
Absolute Address 0x00FC010AD0 (CPM4_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionControls the QoS target latency scale factor for port S2 read and write transactions. This register represents powers of two from the range 2^(-5) to 2^(-12); it is used to match a 16-bit integrator.

por_rni_s2_qos_lat_scale_u_rni_nid0 (CPM4_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:11razRead as zero0x0reserved
s2_ar_lat_scale10:8rwNormal read/write0x0Port S2 AR QoS scale factor 3b000: 2^(-5) 3b001: 2^(-6) 3b010: 2^(-7) 3b011: 2^(-8) 3b100: 2^(-9) 3b101: 2^(-10) 3b110: 2^(-11) 3b111: 2^(-12)
Reserved 7:3razRead as zero0x0reserved
s2_aw_lat_scale 2:0rwNormal read/write0x0Port S2 AW QoS scale factor 3b000: 2^(-5) 3b001: 2^(-6) 3b010: 2^(-7) 3b011: 2^(-8) 3b100: 2^(-9) 3b101: 2^(-10) 3b110: 2^(-11) 3b111: 2^(-12)