Recommended PCB Design Rules for BGA

Versal ACAP Packaging and Pinouts Architecture Manual (AM013)

Document ID
AM013
Release Date
2020-07-16
Revision
1.0 English

Xilinx provides the diameter of a land pad on the package side. This information is required prior to the start of the board layout so the board pads can be designed to match the component-side land geometry. The typical values of these land pads are shown in the following figure and summarized in the table. For Xilinx BGA packages, non-solder mask defined (NSMD) pads on the board are suggested to allow a clearance between the land metal (diameter L) and the solder mask opening (diameter M) as shown in the following figure.

Figure 1. Suggested Board Layout of Soldered Pads for BGA Packages

Table 1. BGA Package Design Rules
Flip-Chip BGA Packages 1.0 mm Pitch 0.92 mm Pitch 0.80 mm Pitch
Design Rule BGA packages, non-solder mask defined dimensions in mm (mils)
Package land pad opening (SMD) 0.53 mm (20.9 mils) 0.53 mm (20.9 mils) 0.40 mm (15.7 mils)
Maximum PCB solder land (L) diameter 0.53 mm (20.9 mils) 0.51 mm (20.0 mils) 0.40 mm (15.7 mils)
Opening in PCB solder mask (M) diameter 0.63 mm (24.8 mils) 0.61 mm (24.0 mils) 0.50 mm (19.7 mils)
Solder ball land pitch (e) 1.00 mm (39.4 mils) 0.92 mm (36.2 mils) 0.80 mm (31.5 mils)

An example of an NSMD PCB pad solder joint is shown in the following figure. The space between the NSMD pad and the solder mask, as well as the actual signal trace widths, depend on the capability of the PCB vendor. The cost of the PCB is higher when the line width and spaces are smaller.

Recommended: Xilinx recommends not mixing PCB pad isolated via-in-pad plated over (VIPPO) and non-VIPPO design styles because they can cause hot-tear defects that are related to localized Z-direction thermal expansion coefficient mismatch between VIPPO and non-VIPPO vias. A VIPPO via expands less than a non-VIPPO via.
Recommended: Xilinx recommends not mixing PCB pad of solder mask defined (SMD) and non-solder mask defined (NSMD) design styles, because this can cause solder bridging defects. For violation, customers need to work with their CM to optimize the stencil design and assembly process.
Recommended: For packages with names beginning with V or L (e.g., VSVA2197 and LSVA3112), the region underneath the land-side capacitors (LSCs) should be covered by solder mask. If traces are routed on the PCB top layer within the LSC region, clearance space between the PCB traces/solder mask and the capacitors must be ensured. Typically, there is 0.13 mm of clearance between the seating plane (PCB) and the surface of the capacitors. Refer to Mechanical Drawings for LSC locations and relevant dimensions for each package.
Figure 2. Example of an NSMD PCB Pad Solder Joint