Non Coherent Interconnect

Versal ACAP CPM CCIX Architecture Manual (AM016)

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1.1 English

The non coherent interconnect connects the CPM, processing system (PS), and DDR via the NoC. It is important to note that the processing system is not in the CCIX coherency domain. This block receives AXI transactions from the PCIe controller block and CMN, and forwards them to the PS after performing a clock domain transfer. In the other direction, it receives AXI transactions on two AXI slave ports from the PS and forwards them to the destination block in the CPM after a clock domain transfer. An ingress AXI interface configures the different blocks in the CPM.