PCB Design Checklist

The following table is a checklist of items that can be used to design and review any GTM transceiver PCB schematic and layout.

Table 1. GTM Transceiver PCB Design Checklist
Pins	Recommendation
GTM_REFCLK0P GTM_REFCLK0N GTM_REFCLK1P GTM_REFCLK1N	When configured as an input: Use AC coupling capacitors for connection to oscillator. For AC coupling capacitors, see Reference Clock Interface. Reference clock oscillator output must comply with the minimum and maximum input amplitude requirements for these input pins. See the Versal ACAP data sheets. When configured as an output: Use AC coupling capacitors for connection to receiving device. For AC coupling capacitors use 0.01 μF. For output signal characteristics, see the Versal ACAP data sheets. If reference pins are not used, leave the associated pin pair unconnected. However, if the IBUFDS_GTE5 is instantiated in the design but not used, the associated pin pair should be connected to GND.
GTM_RXP[0/1/2/3] GTM_RXN[0/1/2/3]	Use AC coupling capacitors for connection to transmitter. The recommended value for AC coupling capacitor is 100 nF. Receiver data traces should be provided enough clearance to eliminate crosstalk from adjacent signals. If a receiver will never be used under any conditions, connect the associated pin pair to GND. If a receiver is not used and not connected to anything under some conditions, but might be connected to something and used under other conditions, then for the conditions when the receiver is unused, either do not instance the GTM transceiver in the Versal ACAP design, or if the GTM transceiver is instanced, set RXPD[1:0] to `2'b11`. See RX Analog Front End for more details.
GTM_TXP[0/1/2/3] GTM_TXN[0/1/2/3]	The transmitter should be AC coupled to the receiver. The recommended value for the AC coupling capacitor is 100 nF. Transmitter data traces should be provided enough clearance to eliminate crosstalk from adjacent signals. If a transmitter is not used, leave the associated pin pair unconnected.
GTM_AVTTRCAL	Connect to GTM_AVTT and to a 100Ω resistor that is also connected to GTM_RREF. Use identical trace geometry for the connection between the resistor and this pin and for the connection from the other pin of the resistor to GTM_RREF. Also, the DC resistance of the PCB trace should be limited to less than 0.5Ω. See Termination Resistor Calibration Circuit. If an entire PSG is not used by any Quads, tie GTM_AVTTRCAL to ground.
GTM_RREF	Connect a 100Ω resistor that is also connected to GTM_AVTTRCAL. Use identical trace geometry for the connection between the resistor and this pin and for the connection from the other pin of the resistor to GTM_AVTTRCAL. Also, the DC resistance of the PCB trace should be limited to less than 0.5Ω. See Termination Resistor Calibration Circuit. If an entire PSG is not used by any Quads, tie MGTRREF to ground.
GTM_AVCC	The nominal voltage is 0.88 V_DC. See the Versal ACAP data sheets for power supply voltage tolerances. The power supply regulator for this voltage should not be shared with non-transceiver loads. Many packages have multiple groups of power supply connections in the package for GTM_AVCC. Information on pin locations for each package can be found in Versal ACAP Packaging and Pinouts Architecture Manual (AM013). For optimal performance, power supply noise must be less than 10 mVpp over the frequency range 10 kHz TO 80 MHz. If all of the Quads in a power supply group are not used, the associated power pins can be left unconnected or tied to GND. For power consumption, power supply sequencing and filter capacitor recommendations, refer to the Xilinx Power Estimator (XPE) at www.xilinx.com/power.
GTM_AVTT	The nominal voltage is 1.2 V_DC. See the Versal ACAP data sheets for power supply voltage tolerances. The power supply regulator for this voltage should not be shared with non-transceiver loads. Many packages have multiple groups of power supply connections in the package for GTM_AVTT. Information on pin locations for each package can be found in Versal ACAP Packaging and Pinouts Architecture Manual (AM013). For optimal performance, power supply noise must be less than 10 mVpp over the frequency range 10 kHz TO 80 MHz. If all of the Quads in a power supply group are not used, the associated power pins can be left unconnected or tied to GND. For power consumption, power supply sequencing and filter capacitor recommendations, refer to XPE at www.xilinx.com/power.
GTM_AVCCAUX	The nominal voltage is 1.5 V_DC. See the Versal ACAP data sheets for power supply voltage tolerances. The power supply regulator for this voltage should not be shared with non-transceiver loads. Many packages have multiple groups of power supply connections in the package for GTM_AVCCAUX. Information on pin locations for each package can be found in Versal ACAP Packaging and Pinouts Architecture Manual (AM013). For optimal performance, power supply noise must be less than 10 mVpp over the frequency range 10 KHz TO 80 MHz. If all of the Quads in a power supply group are not used, the associated power pins can be left unconnected or tied to GND. For power consumption, power supply sequencing and filter capacitor recommendations, refer to XPE at www.xilinx.com/power.