F0_DM_DBI_EN (DDRMC_LPDDR4_XRAM) Register Description
| Register Name | F0_DM_DBI_EN |
|---|---|
| Offset Address | 0x0000000288 |
| Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | Data Mask and DBI setting |
F0_DM_DBI_EN (DDRMC_LPDDR4_XRAM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Value | 2:0 | roRead-only | 0x0 | LPDDR4 Settings 000: Both DM and DBI are disabled 001: DM is enabled 010: DBI write is enabled 011: DM and DBI write are enabled 100: DBI read is enabled 101: DBI read and DM is enabled 110: DBI read and DBI write are enabled 111: DBI read, write, and DM are all enabled |