REG_PCSR_LOCK (CMT_XPLL) Register Description
Register Name | REG_PCSR_LOCK |
---|---|
Offset Address | 0x000000000C |
Absolute Address |
This register description shows register offset addresses relative to the base address of the module. Base addresses vary from one device to another. To determine the correct base address for any device, refer to support.xilinx.com/s/article/00003507. |
Width | 32 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000001 |
Description | NPI Lock Register |
REG_PCSR_LOCK (CMT_XPLL) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
---|---|---|---|---|
Reserved | 31:1 | razRead as zero | 0x0 | Reserved for future use. |
STATE | 0 | rwNormal read/write | 0x1 | In order to enable write operations on the programming registers, the unlock code must be written first to the LOCK register. The unlock code is 0xF9E8D7C6. When the programming register write operation has completed, the LOCK register must be written with any other value(not 0xF9E8D7C6) to re-lock the programming registers. If write happens when LOCK is enabled, the slave will return a slave error except for the LOCK register itself. |