The Xilinx® T2 Telco accelerator card is a PCI Express® (PCIe) Gen3 x16 or 2x Gen4 x8 compliant card featuring the 16 nm Zynq® UltraScale+™ RFSoC ZU48DR device. The T2 card is a single-slot, half height, half length (HHHL) form factor network accelerator card. The card is passively cooled and designed following the maximum PCIe specification of 75W. It is designed to do more than its intended use case. For its intended use case, a maximum electrical power limit of 60W is expected.
Target applications for the T2 card include:
- 5G NR physical layer functional offload, which includes (but it is not
limited to):
- Low-density parity check (LDPC) encoding/decoding
- Rate matching/de-matching
- Code block (CB) and CB group (CBG) processing with HARQ buffer management logic in lookaside mode
- 4G LTE physical layer functional offload, which includes (but it is
not limited to):
- Turbo encoding/decoding
- Rate-matching/de-matching
- CB processing with HARQ buffer management in lookaside mode
CPU intensive encode/decode computations involving LDPC operations are offloaded to the card. The Zynq UltraScale+ RFSoC has hard IP blocks for SD-FEC which can be configured to run LDPC encode/decode operations. There are eight SD-FEC cores per device.