Symbol |
DC Parameter |
Conditions |
Min |
Typ |
Max |
Units |
---|---|---|---|---|---|---|
VCCO |
Supply voltage. |
2.375 |
2.500 |
2.625 |
V |
|
VOH |
Output High voltage for Q and Q. |
RT = 100W across Q and Q signals. |
– |
– |
1.675 |
V |
VOL |
Output Low voltage for Q and Q. |
RT = 100W across Q and Q signals. |
0.700 |
– |
– |
V |
VODIFF |
Differential output voltage: (Q – Q), Q = High (Q – Q), Q = High |
RT = 100W across Q and Q signals. |
247 |
350 |
600 |
mV |
VOCM |
Output common-mode voltage. |
RT = 100W across Q and Q signals. |
1.000 |
1.250 |
1.425 |
V |
VIDIFF |
Differential input voltage: (Q – Q), Q = High (Q – Q), Q = High |
100 |
350 |
600 |
mV |
|
VICM |
Input common-mode voltage. |
0.300 |
1.200 |
1.500 |
V |
|
Notes: 1.Differential inputs for LVDS_25 can be placed in banks with VCCO levels that are different from the required level for outputs. Consult the 7\ Series FPGAs SelectIO Resources User Guide (UG471) [Ref 3] for more information. |