UltraRAM Switching Characteristics

Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926)

Document ID: DS926
Release Date: 2023-05-16
Revision: 1.12 English

The UltraScale Architecture and Product Data Sheet: Overview (DS890) lists the Zynq UltraScale+ RFSoCs that include this memory.

Table 1. UltraRAM Switching Characteristics
Symbol	Description	Speed Grade and V_CCINT Operating Voltages					Units
		0.85V		0.72V
		-2E/-2I/ -2LE	-1E/-1I/ -1M/-1LI	-2LE	-2LI	-1LI
Maximum Frequency
F_MAX	UltraRAM maximum frequency with OREG_B = True	600	575	500	495	481	MHz
F_{MAX_ECC_NOPIPELINE}	UltraRAM maximum frequency with OREG_B = False and EN_ECC_RD_B = True	400	386	312	303	303	MHz
F_{MAX_NOPIPELINE}	UltraRAM maximum frequency with OREG_B = False and EN_ECC_RD_B = False	500	478	404	389	389	MHz
T_PW ¹	Minimum pulse width	700	730	800	832	832	ps
T_RSTPW	Asynchronous reset minimum pulse width. One cycle required	1 clock cycle
The MMCM and PLL DUTY_CYCLE attribute should be set to 50% to meet the pulse-width requirements at the higher frequencies.