IOB 3-state Output Switching Characteristics

Artix UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS931)

Document ID
DS931
Release Date
2022-04-13
Revision
1.2 English

Table 1 specifies the values of TOUTBUF_DELAY_TE_PAD and TINBUF_DELAY_IBUFDIS_O.

  • TOUTBUF_DELAY_TE_PAD is the delay from the T pin to the IOB pad through the output buffer of an IOB pad, when 3-state is enabled (i.e., a high impedance state).
  • TINBUF_DELAY_IBUFDIS_O is the IOB delay from IBUFDISABLE to O output.
  • In HP I/O banks, the internal DCI termination turn-off time is always faster than TOUTBUF_DELAY_TE_PAD when the DCITERMDISABLE pin is used.
  • In HD I/O banks, the internal IN_TERM termination turn-off time is always faster than TOUTBUF_DELAY_TE_PAD when the INTERMDISABLE pin is used.
Table 1. IOB 3-state Output Switching Characteristics
Symbol Description Speed Grade and VCCINT Operating Voltages Units
0.85V 0.72V
-2 -1 -1
TOUTBUF_DELAY_TE_PAD T input to pad high-impedance for HD I/O banks       ns
T input to pad high-impedance for HP I/O banks       ns
TINBUF_DELAY_IBUFDIS_O IBUF turn-on time from IBUFDISABLE to O output for HD I/O banks       ns
IBUF turn-on time from IBUFDISABLE to O output for HP I/O banks       ns