MMCM Switching Characteristics

Artix UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS931)

Document ID
DS931
Release Date
2022-04-13
Revision
1.2 English
Table 1. MMCM Specification
Symbol Description Speed Grade and VCCINT Operating Voltages Units
0.85V 0.72V
-2 -1 -1
MMCM_FINMAX Maximum input clock frequency 933 800 800 MHz
MMCM_FINMIN Minimum input clock frequency 10 10 10 MHz
MMCM_FINJITTER Maximum input clock period jitter < 20% of clock input period or 1 ns Max
MMCM_FINDUTY Input duty cycle range: 10–49 MHz 25–75 %
Input duty cycle range: 50–199 MHz 30–70 %
Input duty cycle range: 200–399 MHz 35–65 %
Input duty cycle range: 400–499 MHz 40–60 %
Input duty cycle range: >500 MHz 45–55 %
MMCM_FMIN_PSCLK Minimum dynamic phase shift clock frequency 0.01 0.01 0.01 MHz
MMCM_FMAX_PSCLK Maximum dynamic phase shift clock frequency 500 450 450 MHz
MMCM_FVCOMIN Minimum MMCM VCO frequency 800 800 800 MHz
MMCM_FVCOMAX Maximum MMCM VCO frequency 1600 1600 1600 MHz
MMCM_FBANDWIDTH Low MMCM bandwidth at typical 1 1.00 1.00 1.00 MHz
High MMCM bandwidth at typical 1 4.00 4.00 4.00 MHz
MMCM_TSTATPHAOFFSET Static phase offset of the MMCM outputs 2 0.12 0.12 0.12 ns
MMCM_TOUTJITTER MMCM output jitter. Note 3
MMCM_TOUTDUTY MMCM output clock duty cycle precision 4 0.20 0.20 0.20 ns
MMCM_TLOCKMAX MMCM maximum lock time for MMCM_FPFDMIN 100 100 100 µs
MMCM_FOUTMAX MMCM maximum output frequency 775 667 667 MHz
MMCM_FOUTMIN MMCM minimum output frequency 4, 5 6.25 6.25 6.25 MHz
MMCM_TEXTFDVAR External clock feedback variation < 20% of clock input period or 1 ns Max
MMCM_RSTMINPULSE Minimum reset pulse width 5.00 5.00 5.00 ns
MMCM_FPFDMAX Maximum frequency at the phase frequency detector 500 450 450 MHz
MMCM_FPFDMIN Minimum frequency at the phase frequency detector 10 10 10 MHz
MMCM_TFBDELAY Maximum delay in the feedback path 5 ns Max or one clock cycle

MMCM_FDPRCLK_MAX

Maximum DRP clock frequency 250 250 250 MHz
  1. The MMCM does not filter typical spread-spectrum input clocks because they are usually far below the bandwidth filter frequencies.
  2. The static offset is measured between any MMCM outputs with identical phase.
  3. Values for this parameter are available in the Clocking Wizard.
  4. Includes global clock buffer.
  5. Calculated as FVCO/128 assuming output duty cycle is 50%.