Recommended Operating Conditions

Artix UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS931)

Document ID
DS931
Release Date
2022-09-06
Revision
1.3 English
Table 1. Recommended Operating Conditions
Symbol Description 1, 2 Min Typ Max Units

FPGA Logic

VCCINT Internal supply voltage 0.825 0.850 0.876 V
For -1LI (VCCINT = 0.72V) devices: internal supply voltage 0.698 0.720 0.742 V
VCCINT_IO 3

Internal supply voltage for the I/O banks

0.825 0.850 0.876 V
For -1LI (VCCINT = 0.72V) devices: internal supply voltage for the I/O banks 0.825 0.850 0.876 V
VCCBRAM Block RAM supply voltage 0.825 0.850 0.876 V
VCCAUX Auxiliary supply voltage 1.746 1.800 1.854 V
VCCO 4 , 5 Supply voltage for HD I/O banks 1.140 3.400 V
Supply voltage for HP I/O banks 0.950 1.900 V
VCCAUX_IO 6 Auxiliary I/O supply voltage 1.746 1.800 1.854 V
VIN 7 I/O input voltage –0.200 VCCO + 0.200 V
IIN 8

Maximum current through any pin in a powered or unpowered bank when forward biasing the clamp diode

10 mA
VBATT 9 Battery voltage 1.000 1.890 V

GTH or GTY Transceiver

VMGTAVCC 10

Analog supply voltage for the GTH or GTY transceiver

0.873 0.900 0.927 V
VMGTAVTT 10

Analog supply voltage for the GTH or GTY transmitter and receiver termination circuits

1.164 1.200 1.236 V
VMGTVCCAUX 10

Auxiliary analog QPLL voltage supply for the transceivers

1.746 1.800 1.854 V
VMGTAVTTRCAL 10

Analog supply voltage for the resistor calibration circuit of the GTH or GTY transceiver column

1.164 1.200 1.236 V

System Monitor

VCCADC

System Monitor supply relative to GNDADC

1.746 1.800 1.854 V
VREFP

System Monitor externally supplied reference voltage relative to GNDADC

1.200 1.250 1.300 V

Temperature

Tj 11 Junction temperature operating range for extended (E) temperature devices 0 100 °C
Junction temperature operating range for industrial (I) temperature devices –40 100 °C
Junction temperature operating range for eFUSE programming 12 –40 125 °C
  1. All voltages are relative to GND, assuming supplies are present.
  2. For the design of the power distribution system consult the UltraScale Architecture PCB Design User Guide (UG583).
  3. VCCINT_IO must be connected to VCCBRAM.
  4. For VCCO_0, the recommended nominal operating voltage is 1.5V or 1.8V, and the minimum voltage for power on and during configuration is 1.425V. After configuration, data is retained even if VCCO drops to 0V.
  5. Includes VCCO of 1.0V (HP I/O only), 1.2V, 1.35V, 1.5V, 1.8V, 2.5V (HD I/O only) at ±5%, and 3.3V (HD I/O only) at +3/–5%.
  6. VCCAUX_IO must be connected to VCCAUX.
  7. The lower absolute voltage specification always applies.
  8. A total of 200 mA per bank should not be exceeded.
  9. If battery is not used, connect VBATT to either GND or VCCAUX.
  10. Each voltage listed requires filtering as described in the UltraScale Architecture GTH Transceivers User Guide (UG576) or the UltraScale Architecture GTY Transceivers User Guide (UG578) .
  11. Xilinx recommends measuring the Tj of a device using the system monitor as described in the UltraScale Architecture System Monitor User Guide (UG580). The system monitor temperature measurement errors (that are described in Table 1) must be accounted for in your design. For example, when using the system monitor with an external reference of 1.25V, and when the system monitor reports 97°C, there is a measurement error ±3°C. A reading of 97°C is considered the maximum adjusted Tj (100°C – 3°C = 97°C).
  12. Do not program eFUSE during device configuration (e.g., during configuration, during configuration readback, or when readback CRC is active).