Revision History

The following table shows the revision history for this document.

Section	Revision Summary
09/06/2022 Version 1.3
Table 1	Removed note about -2LE.
Table 1 and Table 1	Removed note about XCAU10P and XCAU15P in the UBVA368 package pending characterization.
Table 1	In note 1, removed sentence about 12.5 Gb/s operation in the UBVA368 package pending characterization.
04/13/2022 Version 1.2
Recommended Operating Conditions	Updated note 1 and 4.
Table 1	Added new table.
Table 4	Updated note 8.
AC Switching Characteristics	Updated to production release the XCAU10P and XCAU15P in Vivado Design Suite 2022.1 v1.29.
Speed Grade Designations	Updated the following devices in Vivado Design Suite 2022.1 v1.29 for the following speed/temperature grades: XCAU10P: -2E, -2I, -1E, -1I, -1LI, -1LI (V_CCINT = 0.72V) XCAU15P: -2E, -2I, -1E, -1I, -1LI, -1LI (V_CCINT = 0.72V)
Production Silicon and Software Status	Moved all speed grades of the XCAU10P and XCAU15P from advance to production.
Table 5	In DDR4 memory standard, updated data rates for FFVB676 and SFVB784 packages, and added rates for SBVB484 and UBVA368 packages. In DDR3 memory standard, updated data rates for FFVB676 package, and added rates for SBVB484 and UBVA368 packages. In DDR3L memory standard, updated data rates for FFVB676 package, and added rates for SBVB484 and UBVA368 packages. In QDR IV XP memory standard, broke out data rates by package. In RLDRAM 3 memory standard, updated data rates for FFVB676 package, and added rates for SBVB484 and UBVA368 packages. In LPDDR3 memory standard, added data rates for SBVB484 and UBVA368 packages. Removed note about DDR4 DDP components.
Package Parameter Guidelines	Added package skew values for XCAU10P and XCAU15P devices in UBVA368 and SBVB484 packages.
Table 1	Added SBVB484 and UBVA368 packages to note 1.
Table 1	Updated to PCIe Gen1, 2, 3, 4 protocol.
Table 1	Removed line rate of 16.3 Gb/s for SFVB784 package from note 1.
10/20/2021 Version 1.1
AC Switching Characteristics	Updated to production release the XCAU20P in Vivado Design Suite 2021.2 v1.28.
Speed Grade Designations	Updated the following devices in Vivado Design Suite 2021.2 v1.28 for the following speed/temperature grades: XCAU20P: -2E, -2I, -1E, -1I, -1LI XCAU25P: -1LI (V_CCINT = 0.72V)
Production Silicon and Software Status	Updated the following devices in Vivado Design Suite 2021.2 v1.28 for the following speed/temperature grades: XCAU20P: -2E, -2I, -1E, -1I, -1LI XCAU25P: -1LI (V_CCINT = 0.72V) moved from 2021.1.1 to 2021.2.
Quiescent Supply Current	Filled in data for XCAU10P, XCAU15P, and XCAU20P. Updated data for XCAU25P.
Device Pin-to-Pin Output Parameter Guidelines	Added XCAU20P values in the tables.
Device Pin-to-Pin Input Parameter Guidelines	Added XCAU20P values in the tables.
Package Parameter Guidelines	Added XCAU20P values in the table.
08/03/2021 Version 1.0
Initial release.	N/A