Recommended Operating Conditions

Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956)

Document ID
DS956
Release Date
2024-02-29
Revision
1.10 English
Table 1. Recommended Operating Conditions
Symbol Description 1 , 2, 3 Min Typ Max Units
VCCAUX Auxiliary power supply 1.455 1.500 1.545 V
VCCAUX_PMC PMC auxiliary power supply voltage 1.455 1.500 1.545 V
VCCAUX_SMON 4 PMC system monitor power supply relative to GND_SMON 1.455 1.500 1.545 V
VCC_BATT 5 Battery power supply to the battery-backed RAM and battery-backed real-time clock (RTC) 1.200 1.500 V
VCC_FUSE 6 eFUSE programming power supply 1.745 1.800 1.854 V
VCCINT PL primary power supply, low (L) voltage 0.676 0.700 0.724 V
PL primary power supply, low (L) voltage for -2LLI devices 7 0.701 0.725 0.749 V
PL primary power supply, mid (M) voltage 0.775 0.800 0.825 V
PL primary power supply, high (H) voltage 0.854 0.880 0.906 V
VCCINT_GT GTM primary power supply, low (L) and mid (M) voltage 0.775 0.800 0.825 V
GTM primary power supply, high (H) voltage 0.854 0.880 0.906 V
VCC_CPM5 CPM5 primary power supply, low (L) voltage 0.676 0.700 0.724 V
CPM5 primary power supply, mid (M) voltage 0.775 0.800 0.825 V
CPM5 primary power supply, high (H) voltage 0.854 0.880 0.906 V
CPM5 primary power supply, overdrive voltage for higher CPM5 performance in -1LSI, -1LLI, -2LSE, 2LLE, -2MSE, -2MLE, -2MSI, and -2MLI devices 0.854 0.880 0.906 V
VCC_IO 8 XPIO power supply, low (L) and mid (M) voltage 0.775 0.800 0.825 V
XPIO power supply, high (H) voltage 0.854 0.880 0.906 V
VCCO 9

XPIO bank 7## and bank 8## output driver power supply

Includes VCCO of 1.0V, 1.1V, 1.2V, 1.35V, 1.5V at ±5%

0.950 1.575 V

HDIO bank 3## and bank 4## output driver power supply

Includes VCCO of 1.8V, 2.5V at ±5%, and 3.3V at +3/–5%

1.710 3.400 V

PSIO bank 5## power supplies

Includes VCCO of 1.8V, 2.5V at ±5%, and 3.3V at +3/–5%

1.710 3.400 V
VCC_PMC 10 PMC primary power supply, low (L) voltage 0.676 0.700 0.724 V
PMC primary power supply, mid (M) voltage 0.775 0.800 0.825 V
PMC primary power supply, high (H) voltage 0.854 0.880 0.906 V
PMC primary power supply, overdrive voltage for higher PMC performance in -1LSI and -1LLI devices 0.854 0.880 0.906 V
VCC_PSFP PS full-power domain power supply, low (L) voltage 0.676 0.700 0.724 V
PS full-power domain power supply, mid (M) voltage 0.775 0.800 0.825 V
PS full-power domain power supply, high (H) voltage 0.854 0.880 0.906 V
PS full-power domain power supply, overdrive voltage for higher PS performance in -1LSI and -1LLI devices 0.854 0.880 0.906 V
VCC_PSLP PS low-power domain power supply, low (L) voltage 0.676 0.700 0.724 V
PS low-power domain power supply, mid (M) voltage 0.775 0.800 0.825 V
PS low-power domain power supply, high (H) voltage 0.854 0.880 0.906 V
PS low-power domain power supply, overdrive voltage for higher PS performance in -1LSI and -1LLI devices 0.854 0.880 0.906 V
VCC_RAM PL RAM and clocking network power supply, low (L) and mid (M) voltage 0.775 0.800 0.825 V
PL RAM and clocking network power supply, high (H) voltage 0.854 0.880 0.906 V
VCC_SOC 8 Network on Chip (NoC) and DDR memory controller power supply, low (L) and mid (M) voltage 0.775 0.800 0.825 V
NoC and DDR memory controller power supply, high (H) voltage 0.854 0.880 0.906 V

VGTY_AVCC 11

GTY transceiver primary analog power supply

0.854 0.880 0.906 V

VGTYP_AVCC 11

GTYP transceiver primary analog power supply

0.892 0.920 0.948 V
VGTM_AVCC 11

GTM transceiver primary analog power supply

0.892 0.920 0.948 V

VGTY_AVCCAUX 11

VGTYP_AVCCAUX 11

VGTM_AVCCAUX 11

GTY and GTYP (or GTM) transceiver auxiliary analog (PLL) power supply

1.455 1.500 1.545 V

VGTY_AVTT 11

VGTYP_AVTT 11

VGTM_AVTT 11

GTY and GTYP (or GTM) transceiver termination power supply

1.164 1.200 1.236 V

VGTY_AVTTRCAL 11

VGTYP_AVTTRCAL 11

VGTM_AVTTRCAL 11

GTY and GTYP (or GTM) transceiver analog resistor calibration power supply

1.164 1.200 1.236 V
VIN 12,13 I/O input voltage for PSIO, HDIO, and XPIO banks –0.200 VCCO + 0.200 V
IIN 14 Maximum current through any PL, PMC, or PS pin in a powered or unpowered bank when forward biasing the clamp diode 10 mA
Tj 15 Junction temperature operating range for extended (E) temperature devices 16 0 100 °C
Junction temperature operating range for industrial (I) temperature devices 16 –40 100 °C
Junction temperature operating range for military (M) temperature devices 16 –55 125 °C
Junction temperature operating range for eFUSE programming –40 125 °C
  1. All voltages are relative to GND and in relation to the BGA package ball.
  2. For the design of the power distribution system consult the Versal Adaptive SoC PCB Design User Guide (UG863) and Power Design Manager (PDM) tool (download at www.xilinx.com/power).
  3. Each voltage listed requires decoupling as described in the Versal Adaptive SoC PCB Design User Guide (UG863). Refer to the Power Design Manager (PDM) tool (download at www.xilinx.com/power) for design specific decoupling recommendations.
  4. VCCAUX_SMON must be connected to VCCAUX_PMC . See Versal Adaptive SoC System Monitor Architecture Manual (AM006) for VCCAUX_SMON information and filter considerations.
  5. When the battery-backed RAM and the real-time clock are not used, connect to GND.
  6. VCC_FUSE must be within the recommended operating conditions during eFUSE programming. When VCC_FUSE is not used, connect to GND.
  7. The -2LLI devices require the VCCINT supply to power on at 0.725V and then use the PMC dynamic voltage scaling (DVS) drivers to change the voltage of the VCCINT voltage regulator (using the I2C/PMBus) to 0.700V when the device temperature rises above 25°C or to 0.725V when the device temperature falls below 10°C.
  8. VCC_IO must be connected to VCC_SOC.
  9. For XPIO and HDIO operation, see the Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010). PSIO includes PMC dedicated I/O banks, PMC MIO banks, and LPD MIO banks. For PSIO operation, see the Versal Adaptive SoC Technical Reference Manual (AM011) .
  10. The physical unclonable function (PUF) is only supported when using a nominal VCC_PMC of 0.70V on certain Versal devices . Refer to the Versal Adaptive SoC Security Manual (UG1508) in the Design Security Lounge for a list of affected devices and for detailed information on PUF usage, including a VCC_PMC 0.70V solution for mid, high, and overdrive. When using a VCC_PMC 0.70V solution, performance is reduced for functions based on the VCC_PMC. The PUF is not supported in -3H devices.
  11. Each voltage listed requires filtering as described in the Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002) or the Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017) . The noise beyond the recommended operating conditions at the power pins must not exceed 10 mVpp over the band from 10 kHz to 80 MHz.
  12. The lower absolute voltage specification always applies.
  13. In XPIO banks, VIN overshoot above VCCO and undershoot below GND can reduce the performance of VREF-based receivers within the same nibble.
  14. A total of 200 mA per bank should not be exceeded.
  15. Junction temperature specification is in relation to the absolute value reported by the PMC system monitor.
  16. Devices labeled with the -2E speed/temperature grade and all industrial (I) temperature grade devices can operate for a limited time at a junction temperature between 100°C and 110°C based on the temperature read from the SYSMON. Timing parameters adhere to the same speed file at up to 110°C as they do at up to 100°C. Operation up to Tj = 110°C is limited to 3% of the device lifetime and can occur sequentially or at regular intervals as long as the total time does not exceed 3% of the device lifetime. For more information on excursion temperature see Extending the Thermal Solution by Utilizing Excursion Temperatures (WP517).