PS and PMC I2C Controller Interface

Versal AI Core Series Data Sheet: DC and AC Switching Characteristics (DS957)

Document ID: DS957
Release Date: 2024-02-29
Revision: 1.8 English

Table 1. I2C Controller Interface
Symbol	Description¹	Min	Max	Units
I2C Fast-mode Interface
F_{I2CF_CLK}	Serial clock line (SCL) clock frequency	–	400	kHz
F_{I2C_REFCLK} ²	I2C reference clock frequency	–	100	MHz
T_I2CFCKL	SCL Low time	1.3	–	µs
T_I2CFCKH	SCL High time	0.6	–	µs
T_I2CFCKO	Serial data line (SDA) clock-to-out delay	–	900	ns
T_I2CFDCK	SDA input setup time	100	–	ns
T_I2CFCKD	SDA input data hold time	0	–	ns
I2C Standard-mode Interface
F_{I2CS_CLK}	SCL clock frequency	–	100	kHz
F_{I2C_REFCLK} ²	I2C reference clock frequency	–	100	MHz
T_I2CSCKL	SCL Low time	4.7	–	µs
T_I2CSCKH	SCL High time	4.0	–	µs
T_I2CSCKO	SDA clock-to-out delay	–	3450	ns
T_I2CSDCK	SDA input setup time	250	–	ns
T_I2CSCKD	SDA input data hold time	0	–	ns
The test conditions are configured to the LVCMOS 3.3V I/O standard with a 12 mA drive strength, fast slew rate, and a 15 pF load. F_{I2C_REFCLK} specification applies to PMC_I2C_REFCLK, LPD_I2C0_REFCLK, LPD_I2C1_REFCLK, and SYSMON_I2C_REFCLK.