PS Trace Interface

Versal Premium Series Data Sheet: DC and AC Switching Characteristics (DS959)

Document ID
DS959
Release Date
2022-05-02
Revision
1.0 English
Table 1. Trace Interface
Symbol Description 1 Performance as a Function of Speed Grade and Operating Voltage (VCC_PSFP) Units
0.88V (H) 0.80V (M) 0.70V (L)
-3 -2 -2 -1 -2 -1
Min Max Min Max Min Max Min Max Min Max Min Max
FTCECLK Trace clock frequency (MIO) 200 200 200 200 200 167 2 MHz
Trace clock frequency (EMIO) 400 400 350 350 300 250 3 MHz
FDBGTCECLK Trace debug (DBG_TRACE) clock frequency 400 400 400 400 400 333 4 MHz
TTCECKO Trace clock to output delay, all outputs –0.5 0.5 –0.5 0.5 –0.5 0.5 –0.5 0.5 –0.5 0.5 –0.5 0.5 ns
TTCECKO Trace clock duty cycle 45 55 45 55 45 55 45 55 45 55 45 55 %
  1. The test conditions are configured to the LVCMOS 3.3V I/O standard with a 12 mA drive strength, fast slew rate, and a 15 pF load.
  2. The -1LLI and -1LSI low-power devices support an overdrive voltage where the maximum trace clock frequency (MIO) is 200 MHz when VCC_PSLP = 0.88V or VCC_PMC = 0.88V.
  3. The -1LLI and -1LSI low-power devices support an overdrive voltage where the maximum trace clock frequency (EMIO) is 280 MHz when VCC_PSFP = 0.88V.
  4. The -1LLI and -1LSI low-power devices support an overdrive voltage where the maximum trace debug clock frequency is 400 MHz when VCC_PSFP = 0.88V.