DC Characteristics Over Recommended Operating Conditions

Versal HBM Series Data Sheet: DC and AC Switching Characteristics (DS960)

Document ID

DS960

Release Date

2024-02-29

Revision

1.4 English

Table 1. DC Characteristics Over Recommended Operating Conditions
Symbol	Description	Min	Typ¹	Max	Units
C_IN ^{2 , 3}	PSIO die input capacitance at the pad	–	–	3.50	pF
C_IN ^{2 , 3}	XPIO die input capacitance at the pad	–	–	1.75	pF
I_L ³	XPIO and PSIO input or output leakage current per pin (sample-tested)	–	–	15	µA
I_RPU ³	Pad pull-up (when selected) at V_IN = 0V, V_CCO = 3.3V	60	–	200	µA
	Pad pull-up (when selected) at V_IN = 0V, V_CCO = 2.5V	50	–	169	µA
	Pad pull-up (when selected) at V_IN = 0V, V_CCO = 1.8V	29	–	120	µA
	Pad pull-up (when selected) at V_IN = 0V, V_CCO = 1.5V	30	–	120	µA
	Pad pull-up (when selected) at V_IN = 0V, V_CCO = 1.2V	10	–	100	µA
I_RPD	Pad pull-down (when selected) at V_IN = 3.3V	60	–	200	µA
I_RPD	Pad pull-down (when selected) at V_IN = 1.8V	29	–	120	µA
I_{CC_FUSE}	V_{CC_FUSE} supply current during eFUSE programming	–	–	165	mA
Battery Supply Current for VH1522, VH1542, and VH1582 Devices
I_{CC_BATT} ^{4, 5}	Battery supply current at V_{CC_BATT} = 1.20V, RTC disabled	–	–	320	nA
	Battery supply current at V_{CC_BATT} = 1.50V, RTC disabled	–	–	640	nA
	Battery supply current at V_{CC_BATT} = 1.20V, RTC enabled	–	–	1520	nA
	Battery supply current at V_{CC_BATT} = 1.50V, RTC enabled	–	–	2250	nA
Battery Supply Current for VH1742 and VH1782 Devices
I_{CC_BATT} ^{4, 5}	Battery supply current at V_{CC_BATT} = 1.20V, RTC disabled	–	–	480	nA
	Battery supply current at V_{CC_BATT} = 1.50V, RTC disabled	–	–	960	nA
	Battery supply current at V_{CC_BATT} = 1.20V, RTC enabled	–	–	1680	nA
	Battery supply current at V_{CC_BATT} = 1.50V, RTC enabled	–	–	2570	nA
Calibrated programmable on-die termination (DCI) in XPIO banks⁶ (measured per JEDEC specification)
R⁸	Thevenin equivalent resistance of programmable input termination where x = target impedance of 48, 60, 120, or 240	–20%⁷	ODT = RTT_x	+20%⁷	Ω
Differential termination	Programmable differential termination (TERM_100) for XPIO banks	–35%	100	+35%	Ω
Typical values are specified at nominal voltage, 25°C. This measurement represents the die capacitance at the pad, not including the package. Certain pins in devices with multiple SLRs are connected to multiple SLR die pads in the package. For the MODE[3:0], POR_B, and PUDC_B pins in VH1522, VH1542, and VH1582 devices, multiply the characteristics by 2, and in the VH1742 and VH1782 devices multiply the characteristics by 3. For the REF_CLK0 pin in all devices, multiply the characteristic by 2. See the Versal Architecture and Product Data Sheet: Overview (DS950) for device SLR counts. The I_RPU characteristic does not apply to POR_B. Maximum value specified for worst case process at 25°C. Battery-backed RAM (BBRAM) is always enabled and included in I_{CC_BATT} . VR resistor tolerance is (240Ω ±1%). The tolerance limits are specified after calibration with stable voltage and temperature. On-die input termination resistance, for more information see the Versal Adaptive SoC SelectIO Resources Architecture Manual (AM010).