Power Supply Requirements

Versal HBM Series Data Sheet: DC and AC Switching Characteristics (DS960)
Document ID
DS960
Release Date
2024-02-29
Revision
1.4 English

Versal HBM devices are powered by multiple power supply pins that must use specific rail combinations and power sequences. Only some combinations and sequences are supported. The combinations depend upon the selected device, speed specification, and power management options. The required sequencing, power delivery options, and decoupling requirements based on design are found in the Power Design Manager (PDM) tool (download at www.xilinx.com/power).

Table 1. Power Supply Ramp Time
Symbol Description Min Max Units
TVCCAUX Ramp time from GND to 95% of VCCAUX 0.2 40 ms
TVCCAUX_PMC Ramp time from GND to 95% of VCCAUX_PMC 0.2 40 ms
TVCCAUX_SMON Ramp time from GND to 95% of VCCAUX_SMON 0.2 40 ms
TVCC_CPM5 Ramp time from GND to 95% of VCC_CPM5 0.2 40 ms
TVCC_FUSE Ramp time from GND to 95% of VCC_FUSE 0.2 40 ms
TVCCINT Ramp time from GND to 95% of VCCINT 0.2 40 ms
TVCCINT_GTM Ramp time from GND to 95% of VCCINT_GTM 0.2 40 ms
TVCC_IO_VCC_SOC Ramp time from GND to 95% of VCC_IO and VCC_SOC 0.2 40 ms
TVCCO Ramp time from GND to 95% of VCCO 0.2 40 ms
TVCC_PMC Ramp time from GND to 95% of VCC_PMC 0.2 40 ms
TVCC_PSFP Ramp time from GND to 95% of VCC_PSFP 0.2 40 ms
TVCC_PSLP Ramp time from GND to 95% of VCC_PSLP 0.2 40 ms
TVCC_RAM Ramp time from GND to 95% of VCC_RAM 0.2 40 ms
TGTYP_AVCC Ramp time from GND to 95% of VGTYP_AVCC 0.2 40 ms
TGTYP_AVCCAUX Ramp time from GND to 95% of VGTYP_AVCCAUX 0.2 40 ms
TGTYP_AVTT Ramp time from GND to 95% of VGTYP_AVTT 0.2 40 ms
TGTM_AVCC Ramp time from GND to 95% of VGTM_AVCC 0.2 40 ms
TGTM_AVCCAUX Ramp time from GND to 95% of VGTM_AVCCAUX 0.2 40 ms
TGTM_AVTT Ramp time from GND to 95% of VGTM_AVTT 0.2 40 ms
TVCC_HBM Ramp time from GND to 95% of VCC_HBM 0.2 40 ms
TVCCINT_IO_HBM Ramp time from GND to 95% of VCCINT_IO_HBM 0.2 40 ms
TVCCAUX_HBM Ramp time from GND to 95% of VCCAUX_HBM 0.2 40 ms