FAXI_CLK
|
Maximum AXI4 and ACE-LITE
interface frequency |
400 |
350
1
|
350 |
300
2
|
250 |
MHz |
FPLAT_CLK
|
Maximum PL address translation (AT) interface frequency |
400 |
350
1
|
350 |
300
2
|
250 |
MHz |
FPLATB_CLK
|
Maximum PL-PS advanced trace bus (ATB) interface
frequency |
400 |
350
1
|
350 |
300
2
|
250 |
MHz |
FPSACE_CLK
|
Maximum AXI4 coherency
extensions (ACE) interface frequency |
400 |
350
1
|
350 |
300
2
|
250 |
MHz |
FPSACP_CLK
|
Maximum accelerator coherency port (ACP) interface
frequency |
400 |
350
1
|
350 |
300
2
|
250 |
MHz |
FPSFCIDMA_CLK
|
Maximum DMA flow-control interface (FCI) frequency |
400 |
350
1
|
350 |
300
2
|
250 |
MHz |
- The -2MLE and -2MSE devices support an
overdrive voltage (VCC_PSFP = 0.88V or VCC_PSLP = 0.88V) where the maximum clock frequency is
350 MHz.
- The -2LLE and -2LSE devices support an overdrive voltage
(VCC_PSFP = 0.88V or VCC_PSLP = 0.88V) where the maximum clock frequency is 300 MHz.
|