The K26 SOM includes two nonvolatile storage boot devices, a QSPI flash memory, and an eMMC flash memory. The primary boot device is selected by tying the MODE[3:0] pins to the desired value on your carrier card. The boot-mode pins are made available at the SOM connector to allow flexibility in defining the boot device. The boot-mode configurations for using QSPI or eMMC are shown in the following table. Other boot-mode options can be introduced based on your carrier card design. See the Zynq UltraScale+ Device Technical Reference Manual (UG1085) for the full set of boot-mode definitions. Reference the Kria SOM Carrier Card Design Guide (UG1091) for details on strapping the boot-mode resistors.
Boot Mode | PS_Mode Pins[3:0] | Physical Pin Location |
---|---|---|
Quad-SPI (32 bit) |
0010
|
MIO[5:0] |
eMMC |
0110
|
MIO[22:13] |
The K26 SOM provides two storage devices to enable a primary/secondary boot process with isolation between boot firmware and operating system (OS) storage, or similar device firmware segmentation. As an example of a supported hierarchical boot process, the SOM boot mode can be set to QSPI as the primary boot device, which contains the power-on boot firmware, and then the power-on boot loader (e.g., U-Boot) loads the OS from the eMMC secondary boot device.