EEPROM

Kria K26 SOM Data Sheet (DS987)

Document ID
DS987
Release Date
2022-03-15
Revision
1.2 English

The K26 SOM EEPROM is pre-programmed during manufacturing and provides device configuration, identification, and manufacturing data. The EEPROM content is protected as a read-only interface and organized per the IPMI specification. See the information on EEPROM data mapping in the IPMI Platform Management FRU Information Storage Definition v1.0, Revision 1.3, March 24, 2015.

The K26 SOM EEPROM includes the IPMI records defined in the following table. The addresses are expressed in EEPROM physical address offsets.

Table 1. EEPROM Content Summary
Record Area IPMI Record Type Record Start Record End
Header and board area record Board area record 0x00 0x67
DC load multi-record OEM multi-record 0x68 0x79
MAC address multi-record OEM multi-record 0x7A 0x88
Memory configuration multi-record OEM multi-record 0x9B 0xF6
The following table defines the specific content of the EEPROM.
Table 2. EEPROM Content
Address Byte Length Format Description
Header and Board Area Record
0 1 Binary Version
1 1 Binary Internal user area
2 1 Binary Chassis information area
3 1 Binary Board area
4 1 Binary Product information area
5 1 Binary Multi-record area
6 1 Binary Pad
7 1 Binary Checksum
8 1 Binary Version
9 1 Binary Length
A 1 Binary Language code
B 3 Binary Manufacturing date starting on 1/1/1996 in minutes
E 1 Binary Board manufacturer type-length
F 6 ASCII Board manufacturer is Xilinx
15 1 Binary Board product name type-length
16 16 ASCII Board product name
26 1 Binary Board serial type-length
27 16 ASCII Board serial number (any printable ASCII character)
37 1 Binary Board part number type-length
38 9 ASCII Board part number
41 1 Binary FRU file ID type-length
42 1 ASCII FRU file ID (00)
43 1 Binary Revision type-length
44 8 ASCII Revision number
4C 1 Binary PCIe information type/length byte
4D 8 Binary PCIe information
55 1 Binary UUID type-length byte
56 16 Binary UUID
66 1 Binary End of field
67 1 Binary Board area checksum
DC Load Multi-record
68 1 Binary Record type (DC load)
69 1 Binary Record format
6A 1 Binary Length
6B 1 Binary Record checksum
6C 1 Binary Header checksum
6D 1 Binary Output number
6E 2 Binary Nominal voltage (10 mV): VCC_SOM (5V)
70 2 Binary Specified minimum voltage (10 mV)
72 2 Binary Specified maximum voltage (10 mV)
74 2 Binary Specified ripple and noise pk-pk 10 Hz to 30 MHz (mV)
76 2 Binary Minimum current load (mA)
78 2 Binary Maximum current load (mA)
MAC Address Multi-record
7A 1 Binary Record type (OEM)
7B 1 Binary Type
7C 1 Binary Length
7D 1 Binary Record checksum
7E 1 Binary Header checksum
7F 3 Binary Xilinx internet assigned numbers authority (IANA) ID
82 1 Binary Version number
83 6 Binary MAC ID 0
Memory Configuration Multi-record
9B 1 Binary Record type (OEM)
9C 1 Binary Record format
9D 1 Binary Length
9E 1 Binary Record checksum
9F 1 Binary Header checksum
A0 3 Binary Xilinx IANA ID
A3 8 ASCII Memory
AB 12 ASCII Primary boot device memory definition
B7 1 Binary Memory type field end
B8 8 ASCII Memory
C0 12 ASCII SOM secondary boot device memory
CC 1 Binary Memory type field end
CD 8 ASCII Memory
D5 12 ASCII SOM PS DDR memory
E1 1 Binary Memory type field end
E2 8 ASCII Memory
EA 12 ASCII SOM PL DDR memory
F6 1 Binary Memory type field end