Programmable Logic

Kria K26 SOM Data Sheet (DS987)

Document ID
DS987
Release Date
2022-03-15
Revision
1.2 English
The K26 SOM includes a custom-built Zynq UltraScale+ MPSoC (XCK26), that runs optimally (and exclusively) on the K26 SOM and includes a flexible and extensible programmable logic system (PL), an integrated video codec (VCU), and 12.5 Gb/s high-speed transceivers (GTH). The PL resources are summarized in the following table.
Table 1. PL Resources
Resource K26 SOM Description
System logic cells 256,200 Programmable logic cells for available
CLB flip-flops 234,240 Configurable logic block (CLB): Total number of flip-flops
CLB LUTs 117,120 Configurable logic block: Total number of look-up tables
Distributed RAM (Mb) 3.5 Distributed memory
Block RAM 144 Number of 36 Kb block RAMs
Block RAM (Mb) 5.1 Total block RAM memory footprint
UltraRAM blocks 64 288 Kb dual-port, 72-bit-wide memory with error correction
DSP slices 1,248 27 x 18 signed multiplier with 48-bit adder/accumulator
GTH transceivers 4 12.5 Gb/s serial transceivers
Video Codec 1 H.264 and H.265 supported simultaneous encode/decode
HDIO 69 High-density I/O supports 1.2V to 3.3V rails
HPIO 58 High-performance I/O differential pairs supports 1.0V to 1.8V rails