The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 3/15/2022 Version 1.2 | |
| Functional Overview and Block Diagram | Updated the programmable logic in Figure 1 to remove unused blocks. |
| Functional Interfaces | Added physical location column to Table 1 and updated rest of section for clarity. |
| Processing System | Updated the section and the MIO Banks table. |
| Security Features | Removed PUF feature and updated TPM reset discussion. |
| Supported I/O Standards | Moved section and added power-up and configuration information. |
| Signal Naming Conventions | Added Table 3. |
| SOM240_1 Signal Names and Descriptions | Added the pin type column. |
| SOM240_2 Connector Pinout | Updated A4 description in the table. |
| SOM240_2 Signal Names and Descriptions | Added the pin type column. |
| Power Management Signals | Updated information about the PWRGD signals. |
| K26 Reliability | Added section. |
| FCC Class A Products | Updated the Safety Compliance section. |
| Manufacturer Declaration European Community | Updated the section. |
| References | Added links to the Power Design Manager User Guide (UG1556) and the Power Design Manager (PDM) tool (download at www.xilinx.com/power). |
| 7/23/2021 Version 1.1 | |
| Functional Overview and Block Diagram | Clarifying edits to DDR4 memory and Figure 1. |
| Processing System | Added FMAX details for APU, RPU, and GPU. |
| Supported I/O Standards | Added description of XCK26 device. |
| SOM240_1 Connector Pinout | Updated MIO35_WD_OUT and MIO26. |
| SOM240_1 Signal Names and Descriptions | Updated descriptions in table. |
| SOM240_2 Connector Pinout | Corrected errors in table. |
| SOM240_2 Signal Names and Descriptions | Updated descriptions in table. |
| Sideband Signals | Added PS_REF_CLK and PS_PAD_I/O. |
| SOM Connector Power Pins | Updated the VBATT recommended conditions Table 1. Added discussion on connecting unused I/O bank VCCO pins. |
| PS-GTR Transceivers | Added line rate support. |
| GTH Transceivers | Added line rate support. |
| SOM Connector Power Pins | Updated the VBATT recommended conditions Table 1. |
| PL Power Domain Control | Added PL power domain information. |
| Absolute Maximum Specifications | Added table. |
| EEPROM | Corrected MAC address multi-record end value to 0x88. |
| Mechanical Dimensions | Updated Figure 1 to add the distance between connectors. |
| Thermal | Added link to Kria K26 SOM Thermal Design Guide (UG1090). |
| References | |
| 4/20/2021 Version 1.0 | |
| Initial release. | N/A |