SOM Connector Power Pins

Kria K26 SOM Data Sheet (DS987)

Document ID
DS987
Release Date
2022-03-15
Revision
1.2 English

The following table lists all power rails required for the proper operation of the K26 SOM. The carrier card designed for your application should provide these power rails based on the required peripheral I/O voltage. These supplies must be intentionally sequenced as outlined in the Power Sequencing section. Connect the VCCO pins of unused banks together and to the same potential (GND or a valid VCCO voltage).

Table 1. SOM Power Rails
Power Rail Name Supported Voltage Range Maximum Current Description
VCC_SOM 5V (4.75V – 5.25V) 50 mV p-p maximum noise 4A Main power input to the SOM. Supplies power to on-board power regulators.
VCC_BATT 1 1.20 – 1.50V 150 nA – 3650 nA External battery input for the RTC
VCCO_HPA 1.00V – 1.80V 1.0A Voltage rail for HPIO bank 66
VCCO_HPB 1.00V – 1.80V 1.0A Voltage rail for HPIO bank 65
VCCO_HPC 1.00V – 1.80V 1.0A Voltage rail for HPIO bank 64
VCCO_HDA 1.20V – 3.30V 1.0A Voltage rail for HDIO bank 45
VCCO_HDB 1.20V – 3.30V 1.0A Voltage rail for HDIO bank 43
VCCO_HDC 1.20V – 3.30V 1.0A Voltage rail for HDIO bank 44
  1. See Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925) for recommended device conditions when RTC is enabled or disabled.

For the selected I/O type, the supply voltage tolerance at the SOM connector must be within +3%/–2%. For example:

  • If an HPIO bank is configured for the LVDS (1.8V) standard, the VCCO at the SOM connector pin must be within 1.764V–1.854V.
  • If an HDIO bank is configured for the LVDS_25 standard, the VCCO at the SOM connector pin must be within 2.450V–2.575V.