Preload - 1.0 English

APIs Inputs Outputs

APIs	Inputs	Outputs
`pre_load_mem` Preload OCM with random_data/all_zeros/all_ones. Based on the address and data type specified, the data is loaded in OCM. Address must be 32-bit aligned. For example: `versal_cips_0.inst.pspmc_0.inst.PS9_VIP_inst.inst.pre_load_mem(2'b10,44'hFFFF_0000,4);`	[1:0] data_type: Random, zeros or ones. 00/11 – Random 01 – Zeros 10 – Ones [43:0] start_addr: Start Address from where OCM should be initialized with the data [31:0] no_of_bytes: Number of data bytes to be loaded	None
`pre_load_mem_from_file` Preload OCM with data from a file. Based on the address specified, the data is loaded in OCM. For example: `versal_cips_0.inst.pspmc_0.inst.PS9_VIP_inst.inst.pre_load_mem_from_file("preload_ocm.txt",addr1,no_bytes_transfer_ocm);`	[1023:0] file_name: File name (max. 256 characters) [43:0] start_addr: Start Address from where OCM should be initialized with data from the file. [31:0] Num lines: Number of lines (each row should match 32 bits) Note: start_addr should be 32-bit aligned.	None

pre_load_mem

Preload OCM with random_data/all_zeros/all_ones. Based on the address and data type specified, the data is loaded in OCM. Address must be 32-bit aligned.

For example: versal_cips_0.inst.pspmc_0.inst.PS9_VIP_inst.inst.pre_load_mem(2'b10,44'hFFFF_0000,4);

[1:0] data_type: Random, zeros or ones.

00/11 – Random
01 – Zeros
10 – Ones

[43:0] start_addr: Start Address from where OCM should be initialized with the data

[31:0] no_of_bytes: Number of data bytes to be loaded

None

pre_load_mem_from_file

Preload OCM with data from a file. Based on the address specified, the data is loaded in OCM.

For example: versal_cips_0.inst.pspmc_0.inst.PS9_VIP_inst.inst.pre_load_mem_from_file("preload_ocm.txt",addr1,no_bytes_transfer_ocm);

[1023:0] file_name: File name (max. 256 characters)

[43:0] start_addr: Start Address from where OCM should be initialized with data from the file.

[31:0] Num lines: Number of lines (each row should match 32 bits)

Note: start_addr should be 32-bit aligned.

None