The following table shows the revision history for this document.
| Section | Revision Summary |
|---|---|
| 09/05/2023 Version 1.5 | |
| Primary Boot Is Not Supported With eMMC Devices That Require CMD6 Busy Time Greater Than 1 ms | Added errata. |
| 05/30/2023 Version 1.4 | |
| Devices | Added XQVC1702 device. |
| 04/03/2023 Version 1.3 | |
| Calibrated Deskew Is Not Supported | Added errata. |
| Control IMUX Registers Are Not Supported | Removed issue: Not a deviation from the production specification. |
| Readback Capture Is Not Supported | Removed issue: Not a deviation from the production specification. |
| In RC Mode With SMMU Enabled, CCI Transaction Ordering Is Not Followed Between Different Shareability Domain Memories That Have Same AXI ID | Added errata. |
| In RP Mode, Some Extended Capabilities End At AER | Added errata. |
| CfgWr Request To Put Device Into PPM D3 In Between Posted Writes Can Cause A UR | Updated list of affected devices. |
| 10/21/2022 Version 1.2 | |
| Devices | Added XQVC1902 and XQRVC1902 devices. |
| Errata Summary | Added XQVC1902 and XQRVC1902 devices to applicable errata. |
| IPOR Issued After An SRST Causes A Boot Failure | Added errata. |
| 11/12/2021 Version 1.1 | |
| HDIO/MIO: When An Output Is Powered At 3.3V Or 2.5V, A Race Condition Can Exist Between Data And Tristate | Added new errata issue. |
| 4/14/2021 Version 1.0 | |
| Initial release. | N/A |