Arm Cortex-A53 64-bit Processor Boot Code - 2023.2 English

Standalone Library Documentation: BSP and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2023-12-13
Version
2023.2 English

The boot code performs minimum configuration which is required for an application. Cortex-A53 starts by checking current exception level. If the current exception level is EL3 and BSP is built for EL3, it will do initialization required for application execution at EL3. Below is a sequence illustrating what all configuration is performed before control reaches to main function for EL3 execution.

  1. Program vector table base for exception handling
  2. Set reset vector table base address
  3. Program stack pointer for EL3
  4. Routing of interrupts to EL3
  5. Enable ECC protection
  6. Program generic counter frequency
  7. Invalidate instruction cache, data cache and TLBs
  8. Configure MMU registers and program base address of translation table
  9. Transfer control to _start which clears BSS sections and runs global constructor before jumping to main application

If the current exception level is EL1 and BSP is also built for EL1_NONSECURE it will perform initialization required for application execution at EL1 non-secure. For all other combination, the execution will go into infinite loop. Below is a sequence illustrating what all configuration is performed before control reaches to main function for EL1 execution.

  1. Program vector table base for exception handling
  2. Program stack pointer for EL1
  3. Invalidate instruction cache, data cache and TLBs
  4. Configure MMU registers and program base address of translation table
  5. Transfer control to _start which clears BSS sections and runs global constructor before jumping to main application