XilFPGA library acts as a bridge between the user application and the PL device. It provides the required functionality to the user application for configuring the PL Device with the required bitstream.
The following figure illustrates an implementation where the XilFPGA library needs the CSU DMA driver APIs to transfer the bitstream from the DDR to the PL region. The XilFPGA library also needs the XilSecure library APIs to support programming authenticated and encrypted bitstream files.
Figure 1. Bitstream loading on Linux
The following figure illustrates the XilFPGA PL configuration sequence.
Figure 2. XilFPGA PL Configuration Sequence
The following figure illustrates the bitstream write sequence.
Figure 3. Bitstream write Sequence
