For Zynq UltraScale+ RFSoC DFE when leveraging DFE-CFR Primitive, the selectable configurations are as follows:
- Support for clock-to-sample ratio of 1.
- PC-CFR stages with Smart Peak Processing enabled.
- Support for 1, 2, 4, and 8 antennas.
- Post-processing stage fixed to WCFR.