Interfaces - 1.0 English

XDMA/QDMA Simulation (PB062)

Document ID
PB062
Release Date
2020-12-03
Version
1.0 English
Table 1. Interface Descriptions
Port Name Mode Enabled Description
M_AXI_CTRL Master Always Enabled Control interface (AXILITE)
M_AXIMM Master Always Enabled Data interface (AXIMM)
M_AXIMM_AUX Master Enabled using C_M_AXIMM_AUX_ENABLE Reserved
M_AXIS Master Enabled using C_STM_ITF_ENABLE AXI4-Stream interface connected to STM IP
S_AXIS Slave Enabled using C_STM_ITF_ENABLE AXI4-Stream interface connected to STM IP