Use Model - 1.0 English

XDMA/QDMA Simulation (PB062)

Document ID
PB062
Release Date
2020-12-03
Version
1.0 English

This IP is designed to be used in hardware emulation flows for Alveo™ platforms with Vitis™ tools. It is not intended to be used outside the Vitis environment hardware emulation use cases as a standalone IP.

For platforms that do not support an AXI4-Stream interface:

  1. Disable M_AXIS and S_AXIS interface
  2. Use M_AXI_CTRL interface for any control transaction
  3. Use M_AXIMM for memory transactions

For platforms that support an AXI4-Stream interface:

  1. Enable M_AXIS and S_AXIS interface and connect to STM IP core model
  2. Use M_AXI_CTRL interface for any control transaction
  3. Use M_AXIMM for memory transactions