Hardware Testing - 6.2 English

Video Timing Controller Product Guide (PG016)

Document ID
PG016
Release Date
2023-11-03
Version
6.2 English

The Video Timing Controller core has been tested in a variety of hardware platforms at AMD to represent a variety of parameterizations, including the following:

A test design was developed for the core that incorporated a MicroBlaze™ processor, AXI4 Interconnect and various other peripherals. The software for the test system included live video input for the Video Timing Controller core. The Video Timing Controller, in addition to live video, was also connected in loopback allow the generator to feed the detector for a robust loopback test. Various tests could be supported by varying the configuration of the Timing Controller core or by loading a different software executable. The MicroBlaze processor was responsible for:

° Initializing the appropriate input and output buffers in external memory.

° Initializing the Video Timing Controller core.

° Initializing the HDMI/DVI input and output cores for live video.

° Launching the test.

° Configuring the Video Timing Controller for various input frame sizes and checking the detection/generation loopback connection for correct video detection

° Controlling the peripherals including the UART and AXI VDMAs.