The gen_clken Pin - 6.2 English

Video Timing Controller Product Guide (PG016)

Document ID
Release Date
6.2 English

The gen_clken pin is an active-High, synchronous clock-enable pertaining to the Video Timing Controller generator (output) interface. This clock enable allows halting the generator independently from the detector . The internal generator clock enable is a logical "AND" between the clken and get_clken inputs. For example, to enable the detector while halting the generator, drive clken to '1', det_clken to '1' and gen_clken to '0'. The internal logic that controls the generator sub-core clock enable is shown in This Figure .

Figure 2-3: Generator Internal Clock Enable Logic

X-Ref Target - Figure 2-3