Read (MM2S) channel: When configured as the Dynamic Genlock Slave, the channel accesses the previous frame that the Dynamic Genlock Master operated on. It samples the Dynamic Genlock Master frame number on mm2s_frame_ptr_in. It outputs the current accessed frame number on mm2s_frame_ptr_out.
To set up the channel in Dynamic Genlock Slave mode, the following settings should be used:
•Set GenlockEn (MM2S_VDMACR[3]=1) to enable Genlock synchronization between master and slave.
•Set GenlockSrc (MM2S_VDMACR[7]=1) to enable Internal Genlock mode. This bit is set to 1 by default if both channels are enabled in the Vivado IDE. When it is set to 1, you do not need to connect *_frame_ptr_out and *_frame_ptr_in signals externally. They are routed internally in the core.
Write (S2MM) channel: When configured as a Dynamic Genlock Slave, the channel accesses the previous frame that the Dynamic Genlock Master operated on. It samples the Dynamic Genlock Master frame number on s2mm_frame_ptr_in. It outputs the current accessed frame number on s2mm_frame_ptr_out.
To set up the AXI VDMA in Dynamic Genlock Slave mode, the following settings should be used:
•Set GenlockEn (S2MM_VDMACR[3]=1) to enable Genlock synchronization between master and slave.
•Set GenlockSrc (S2MM_VDMACR[7]=1) to enable Internal Genlock mode. This bit is set to 1 by default if both channels are enabled in the Vivado IDE. When it is set to 1, you do not need to connect *_frame_ptr_out and *_frame_ptr_in signals externally. They are routed internally in the core.
This Figure illustrates the simple timing of the Genlock operation. In this example, Write(S2MM) channel has been configured as the Genlock Master and Read(MM2S) channel has been configured as the Genlock Slave and Write channel frame rate is faster than that of Read channel.
As seen in This Figure, in the time the Write channel cycles through frame 0, 1, 2 and back to 0, the Read channel has only cycled through two frame.
Due to the slow frame rate of the Read channel compared to the Write channel, the Read channel processes frame 2 then frame 0 then frame 2 again, skipping frame 1.
The Genlock Master uses the index of the Start Address register to specify which Start Address register the Genlock Slave should use. This Start Address register index is encoded as a Gray code value and appears on mm2s_frame_ptr_out and s2mm_frame_ptr_out for the MM2S and S2MM channels respectively.
This Figure illustrates the simple timing of the Dynamic Genlock operation. In this example, the Write (S2MM) channel has been configured as the Dynamic Genlock Master and Read (MM2S) channel has been configured as the Dynamic Genlock Slave and Write channel frame rate is faster than that of Read channel.
In Dynamic Genlock operation
•Master does not step onto the Slave current working frame.
•Slave works on the last completed frame by Master.
In This Figure, after cycling through frame 0, 1, 2, the Write channel finds the Read channel on frame 0, and therefore skips this frame and moves to frame 1. The Read channel processes the last completed frame by the Write channel.
