In many video applications, a producer of data runs at a different rate than the consumer of that data. To avoid the potential ill effects such that a rate mismatch can cause, frame buffering is often used. Frame buffering allocates multiple frames worth of memory to be used to hold the data. The data producer writes to one buffer while the consumer reads from another.
The Genlock feature of the AXI VDMA compensates for this by preventing the read and write channels from accessing the same frame simultaneously.
The AXI VDMA supports four modes of Genlock synchronization. They are Genlock Master, Genlock Slave, Dynamic Genlock Master and Dynamic Genlock Slave. This Figure and This Figure show the valid Genlock Connections.
IMPORTANT: By default, the mm2s_frame_ptr_in (s2mm_frame_ptr_in) port is not exposed if the Internal Genlock connection is established inside the core and parameter C_MM2S_GENLOCK_NUM_MASTERS =1 (C_S2MM_GENLOCK_NUM_MASTERS =1).
An Internal Genlock connection is established inside the core when
(i) Both VDMA channels are enabled and
(ii) One channel is Master and the other is Slave (or one channel is Dynamic Master and other is Dynamic Slave).
This means that you do not need to do the explicit external connection.
If you are an advanced user and want to access the mm2s_frame_ptr_in (s2mm_frame_ptr_in) port for some specific purpose, you can do this by setting the parameter C_MM2S_GENLOCK_NUM_MASTERS > 1 (C_S2MM_GENLOCK_NUM_MASTERS > 1) using the Tcl Console command in the Vivado design tools (or IP integrator). See Frame Pointers Gray Code Outputs for an example Tcl Console command reference and other details.
