S2MM HSIZE Status Register S2MM_HSIZE_STATUS (offset 0xF0h) - 6.3 English

AXI Video Direct Memory Access v6.3 Product Guide (PG020)

Document ID
PG020
Release Date
2022-06-08
Version
6.3 English

This provides hsize count captured when first EOLEarlyErr occurs from the incoming stream of the S2MM channel. This register gets cleared automatically when S2MM_DMASR[8] is cleared.

Table 4-4:      S2MM HSIZE Status Register Details

Bits

Field Name

Default Value

Access Type

Description

31 downto 16

Reserved

0

RO

Writing to these bits has no effect, and they are always read as zeros.

15 downto 0

S2MMHsizeSts

0

RO

Indicates HSIZE count captured at first EOLEarlyErr error for S2MM channel.