S2MM VSIZE Status Register S2MM_VSIZE_STATUS (offset 0xF4h) - 6.3 English

AXI Video Direct Memory Access v6.3 Product Guide (PG020)

Document ID
PG020
Release Date
2022-06-08
Version
6.3 English

This provides vsize count captured when first SOFEarlyErr occurs from the incoming stream of the S2MM channel. This register gets cleared automatically when S2MM_DMASR[7] is cleared.

Table 4-5:      S2MM VSIZE Status Register Details

Bits

Field Name

Default Value

Access Type

Description

31 downto 13

Reserved

0

RO

Writing to these bits has no effect, and they are always read as zeros.

12 downto 0

S2MMVsizeSts

0

RO

Indicates VSIZE count captured at first SOFEarlyErr error for S2MM channel.