The AXI DataMover has two reset inputs for each of the MM2S and S2MM blocks for a total of four reset inputs.
AXI DataMover requires that the input reset assertion must be a minimum of three clock periods of the synchronizing clock.
Table: Clock, Reset, and its Associated Interface
shows the clock and reset signals and its associated interface.
Table 3-1:
Clock, Reset, and its Associated Interface
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Asynchronous Mode
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Blocks
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Interface
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Disabled
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Enabled
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MM2S
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Memory map and Streaming Interface
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m_axi_mm2s_aclk and m_axi_mm2s_aresetn
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m_axi_mm2s_aclk and m_axi_mm2s_aresetn
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Command and Status Interface
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m_axi_mm2s_aclk and m_axi_mm2s_aresetn
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m_axis_mm2s_cmdsts_aclk and m_axis_mm2s_cmdsts_aresetn
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Asynchronous Mode
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Blocks
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Interface
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Disabled
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Enabled
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S2MM
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Memory map and Streaming Interface
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m_axi_s2mm_aclk and m_axi_s2mm_aresetn
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m_axi_s2mm_aclk and m_axi_s2mm_aresetn
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Command and Status Interface
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m_axi_s2mm_aclk and m_axi_s2mm_aresetn
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m_axis_s2mm_cmdsts_awclk and m_axis_s2mm_cmdsts_aresetn
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