Resource Utilization - 5.1 English

AXI DataMover LogiCORE IP Product Guide (PG022)

Document ID
PG022
Release Date
2022-04-26
Version
5.1 English

The AXI DataMover resource utilization for various parameter combinations measured with 7 series, Zynq®-7000 ( Table: 7 Series and Zynq-7000 Device Resource Estimates ), and UltraScale™ devices ( Table: UltraScale Device Resource Estimates ).

Table 2-4: 7 Series and Zynq-7000 Device Resource Estimates

MM2S

S2MM

Resources

Addr Width

Type

MMap Width

Streaming Width

Burst Length

BTT Width

Async Mode

Store and Forward

Unaligned Transfer

Type

MMap Width

Streaming Width

Burst Length

BTT Width

Async Mode

Store and Forward

Unaligned Transfer

Indeterminate BTT

Slice

Luts

Reg

Block RAM

32

Basic

32

32

16

16

NA

NA

NA

Basic

32

32

16

16

NA

NA

NA

NA

207

543

645

0

32

Full

32

32

16

16

FALSE

TRUE

FALSE

Full

32

32

16

16

FALSE

TRUE

FALSE

FALSE

430

1158

1128

2

32

Full

64

64

8

23

FALSE

TRUE

FALSE

Full

64

64

8

23

FALSE

TRUE

FALSE

FALSE

545

1435

1497

3

32

Full

64

32

8

16

FALSE

TRUE

TRUE

Full

64

32

8

16

FALSE

TRUE

TRUE

FALSE

574

1515

1563

3

32

Full

32

32

16

16

TRUE

TRUE

FALSE

Full

32

32

16

16

TRUE

FALSE

FALSE

TRUE

613

1277

1737

6

64

Full

32

32

16

16

FALSE

TRUE

FALSE

Full

32

32

16

16

FALSE

TRUE

FALSE

FALSE

504

1303

1336

2

64

Full

32

32

16

16

TRUE

TRUE

FALSE

Full

32

32

16

16

TRUE

FALSE

FALSE

TRUE

589

1322

1680

8

Table 2-5: UltraScale Device Resource Estimates

MM2S

S2MM

Resources

Addr Width

Type

MMap Width

Streaming Width

Burst Length

BTT Width

Async Mode

Store and Forward

Unaligned Transfer

Type

MMap Width

Streaming Width

Burst Length

BTT Width

Async Mode

Store and Forward

Unaligned Transfer

Indeterminate BTT

Slice/CLB

Luts

Reg

Block RAM

32

Basic

32

32

16

16

NA

NA

NA

Basic

32

32

16

16

NA

NA

NA

NA

134

558

645

32

Full

32

32

16

16

FALSE

TRUE

FALSE

Full

32

32

16

16

FALSE

TRUE

FALSE

FALSE

265

1193

1130

2

32

Full

64

64

8

23

FALSE

TRUE

FALSE

Full

64

64

8

23

FALSE

TRUE

FALSE

FALSE

347

1481

1499

3

32

Full

64

32

8

16

FALSE

TRUE

TRUE

Full

64

32

8

16

FALSE

TRUE

TRUE

FALSE

352

1569

1564

3

32

Full

32

32

16

16

TRUE

TRUE

FALSE

Full

32

32

16

16

TRUE

FALSE

FALSE

TRUE

313

1300

1740

6

64

Full

32

32

16

16

FALSE

TRUE

FALSE

Full

32

32

16

16

FALSE

TRUE

FALSE

FALSE

316

1357

1338

2

64

Full

32

32

16

16

TRUE

TRUE

FALSE

Full

32

32

16

16

TRUE

FALSE

FALSE

TRUE

353

1451

2000

8