Additional Design Information - 4.1 English

AXI Central Direct Memory Access LogiCORE IP Product Guide (PG034)

Document ID
PG034
Release Date
2022-05-18
Version
4.1 English
AXI DMA v4.1 LogiCORE IP Product Guide (PG034)

Additional Design Information

The parameter, C_INCLUDE_SF, is hidden because it is not required for most use cases. However, this parameter and associated features can be enabled by entering the following command in the Tcl Console in the Vivado® Integrated Design Environment (IDE).

The hidden parameter can be enabled in the Vivado design tools using the following command.

set_property -dict [list CONFIG.param_name {val}] [get_ips axi_cdma_xyz]

Where axi_cdma_xyz is the component name in the Vivado design tools.

To enable the parameter in the IP integrator, use the following command.

set_property -dict [list CONFIG.C_INCLUDE_SF {val}] [get_bd_cells axi_cdma_xyz]

Where axi_cdma_xyz is the component name in the IP integrator and val can be a 0 (to disable this feature) or 1 (to enable it).