CURDESC_PNTR_MSB (CDMA Current Descriptor Pointer Offset – 0Ch) - 4.1 English

AXI Central Direct Memory Access LogiCORE IP Product Guide (PG034)

Document ID
PG034
Release Date
2022-05-18
Version
4.1 English

This register provides the upper 32 bits of the Current Descriptor Pointer for the AXI CDMA Scatter Gather Descriptor Management. This is applicable when the address space is greater than 32.

Figure 2-5:      CURDESC_PNTR_MSB Register

X-Ref Target - Figure 2-5

X14560-pg034_curdesc_pnter_detail_msb_x14560.jpg
Table 2-7:      CURDESC_PNTR_MSB Register Details

Bits

Field Name

Default Value

Access Type

CDMA Mode Used

Description

31 to 0

Current Descriptor Pointer

0

R/W

(RO)

SG

Current Descriptor Pointer. Indicates the pointer of the current descriptor being worked on. This register must contain a pointer to a valid descriptor prior to writing to the TAILDESC_PTR register. Failure to do so results in an undefined operation by the CDMA.

When the CDMA SG Engine is running (CDMASR.IDLE = 0), the CURDESC_PNTR register is updated by the SG Engine to reflect the starting address of the current descriptor being executed.

On error detection, the CURDESC_PNTR register is updated to reflect the descriptor associated with the detected error.

The register should only be written by the software application when the AXI CDMA is idle (CDMASR.IDLE = 1). Descriptor addresses written to this field must be aligned to 64-byte boundaries (sixteen 32-bit words). Examples are 0x00, 0x40, 0x80. Any other alignment has undefined results.

This register is cleared when CDMACR.SGMode = 0.

Notes:

1.RO = Read Only. Writing has no effect.

2.R/W = Read/Write