Register Address Map - 4.1 English

AXI Central Direct Memory Access LogiCORE IP Product Guide (PG034)

Document ID
PG034
Release Date
2022-05-18
Version
4.1 English
Table 2-3:      AXI CDMA Register Summary

Address Space Offset(1)

Name

Description

00h

CDMACR

CDMA Control

04h

CDMASR

CDMA Status

08h

CURDESC_PNTR

Current Descriptor Pointer

0Ch(2)

CURDESC_PNTR_MSB

Current Descriptor Pointer. MSB 32 bits. Applicable only when the address space is greater than 32.

10h

TAILDESC_PNTR

Tail Descriptor Pointer

14h(2)

TAILDESC_PNTR_MSB

Tail Descriptor Pointer. MSB 32 bits. Applicable only when the address space is greater than 32.

18h

SA

Source Address

1Ch(2)

SA_MSB

Source Address. MSB 32 bits. Applicable only when the address space is greater than 32.

20h

DA

Destination Address

24h(2)

DA_MSB

Destination Address. MSB 32 bits. Applicable only when the address space is greater than 32.

28h

BTT

Bytes to Transfer

Notes:

1.Address Space Offset is relative to C_BASEADDR assignment.

2.This register is applicable only when the address width is more than 32. This register holds the upper 32 bits of the Address.