Transfer Descriptor SA_MSB Word (Source Address — Offset 0Ch) - 4.1 English

AXI Central Direct Memory Access LogiCORE IP Product Guide (PG034)

Document ID
PG034
Release Date
2022-05-18
Version
4.1 English

This word provides the MSB 32 bits of the starting address for the data read operations for the associated DMA transfer. This is used only when the address space is more than 32.

 

Figure 3-5:      Transfer Descriptor SA_MSB Word

X-Ref Target - Figure 3-5

pg034_td_sa_detail_x1329200021.jpg
Table 3-5:      Transfer Descriptor SA_MSB Word Details

Bits

Field Name

Description

31 to 0

SA

Source Address. This value specifies the MSB 32 bits of the starting address for data read operations for the associated DMA transfer. This field is applicable only when the address space is more than 32.