Example Design - 4.1 English

Soft Error Mitigation Controller Product Guide (PG036)

Document ID
PG036
Release Date
2022-05-04
Version
4.1 English

This section provides an overview of the SEM Controller system-level example design and the interfaces it exposes. The system-level example design encapsulates the controller and various shims that serve to interface the controller to other devices. These shims can include I/O Pins, VIO LogiCORE™ IP, I/O Interfaces, Memory Controllers, or application-specific system management interfaces.

The system-level example design is verified along with the controller. As delivered, the system-level example design is not a “reference design,” but an integral part of the total solution. While users do have the flexibility to modify the system-level example design, the recommended approach is to use it as delivered.