External Memory Programming File - 4.1 English

Soft Error Mitigation Controller Product Guide (PG036)

Document ID
PG036
Release Date
2022-05-04
Version
4.1 English

When error correction by replace is enabled, an image of the configuration data is required. When error classification is enabled, an image of the essential bit lookup data is required. As a result, one or both of these data sets might be required. The data sets are identical in size, with their size a function of the target device. The data sets are generated by the write_bitstream application.

The format of the data is required to be binary, using the full data set(s) generated by write_bitstream. The external storage must be byte addressable. A small table is required at the address specified to the SEM Controller through fetch_tbladdr[31:0] . By default, fetch_tbladdr[31:0] is zero.

For non-SSI devices, the table format is:

Byte 0: 32-bit pointer to start of replacement data, byte 0 (least significant byte)

Byte 1: 32-bit pointer to start of replacement data, byte 1

Byte 2: 32-bit pointer to start of replacement data, byte 2

Byte 3: 32-bit pointer to start of replacement data, byte 3 (most significant byte)

Byte 4: 32-bit pointer to start of essential bit data, byte 0 (least significant byte)

Byte 5: 32-bit pointer to start of essential bit data, byte 1

Byte 6: 32-bit pointer to start of essential bit data, byte 2

Byte 7: 32-bit pointer to start of essential bit data, byte 3 (most significant byte)

Remaining bytes are reserved, filled with ones

For SSI devices, the table format is:

Byte 0: 32-bit pointer to start of hardware SLR0 (master) replacement data, byte 0 (least significant byte)

Byte 1: 32-bit pointer to start of hardware SLR0 (master) replacement data, byte 1

Byte 2: 32-bit pointer to start of hardware SLR0 (master) replacement data, byte 2

Byte 3: 32-bit pointer to start of hardware SLR0 (master) replacement data, byte 3 (most significant byte)

Byte 4: 32-bit pointer to start of hardware SLR0 (master) essential bit data, byte 0 (least significant byte)

Byte 5: 32-bit pointer to start of hardware SLR0 (master) essential bit data, byte 1

Byte 6: 32-bit pointer to start of hardware SLR0 (master) essential bit data, byte 2

Byte 7: 32-bit pointer to start of hardware SLR0 (master) essential bit data, byte 3 (most significant byte)

Byte 8: 32-bit pointer to start of hardware SLR1 (optional slave) replacement data, byte 0 (least significant byte)

Byte 9: 32-bit pointer to start of hardware SLR1 (optional slave) replacement data, byte 1

Byte 10: 32-bit pointer to start of hardware SLR1 (optional slave) replacement data, byte 2

Byte 11: 32-bit pointer to start of hardware SLR1 (optional slave) replacement data, byte 3 (most significant byte)

Byte 12: 32-bit pointer to start of hardware SLR1 (optional slave) essential bit data, byte 0 (least significant byte)

Byte 13: 32-bit pointer to start of hardware SLR1 (optional slave) essential bit data, byte 1

Byte 14: 32-bit pointer to start of hardware SLR1 (optional slave) essential bit data, byte 2

Byte 15: 32-bit pointer to start of hardware SLR1 (optional slave) essential bit data, byte 3 (most significant byte)

Byte 16: 32-bit pointer to start of hardware SLR2 (optional slave) replacement data, byte 0 (least significant byte)

Byte 17: 32-bit pointer to start of hardware SLR2 (optional slave) replacement data, byte 1

Byte 18: 32-bit pointer to start of hardware SLR2 (optional slave) replacement data, byte 2

Byte 19: 32-bit pointer to start of hardware SLR2 (optional slave) replacement data, byte 3 (most significant byte)

Byte 20: 32-bit pointer to start of hardware SLR2 (optional slave) essential bit data, byte 0 (least significant byte)

Byte 21: 32-bit pointer to start of hardware SLR2 (optional slave) essential bit data, byte 1

Byte 22: 32-bit pointer to start of hardware SLR2 (optional slave) essential bit data, byte 2

Byte 23: 32-bit pointer to start of hardware SLR2 (optional slave) essential bit data, byte 3 (most significant byte)

Byte 24: 32-bit pointer to start of hardware SLR3 (optional slave) replacement data, byte 0 (least significant byte)

Byte 25: 32-bit pointer to start of hardware SLR3 (optional slave) replacement data, byte 1

Byte 26: 32-bit pointer to start of hardware SLR3 (optional slave) replacement data, byte 2

Byte 27: 32-bit pointer to start of hardware SLR3 (optional slave) replacement data, byte 3 (most significant byte)

Byte 28: 32-bit pointer to start of hardware SLR3 (optional slave) essential bit data, byte 0 (least significant byte)

Byte 29: 32-bit pointer to start of hardware SLR3 (optional slave) essential bit data, byte 1

Byte 30: 32-bit pointer to start of hardware SLR3 (optional slave) essential bit data, byte 2

Byte 31: 32-bit pointer to start of hardware SLR3 (optional slave) essential bit data, byte 3 (most significant byte)

Remaining bytes are reserved, filled with ones

A pointer value of 0xFFFFFFFF is used if a particular block of data is not present. The essential bit data and replacement data can be located at any addresses provided each data block is contiguous and it is possible to perform a read burst through each data block. For SPI flash that does not support read burst across device boundaries, data blocks must be located so that they do not straddle any of these device boundaries. For example, many SPI flash of a density greater than 256 Mbit do not allow read burst across 256 Mbit boundaries.

The Tcl script, which post processes the write_bitstream output files, generates three outputs:

An Intel hex data file (MCS) for programming SPI flash devices

A raw binary data file (BIN) for programming SPI flash devices

An initialization file (VMF) for loading SPI flash simulation models