FRAME_ECC Interface - 4.1 English

Soft Error Mitigation Controller Product Guide (PG036)

Document ID
PG036
Release Date
2022-05-04
Version
4.1 English

The FRAME_ECC Interface is a point-to-point connection between the SEM Controller and the FRAME_ECC primitive. The FRAME_ECC primitive is an output-only primitive that provides a window into the soft error detection function in the FPGA configuration system. The FRAME_ECC primitive and the behavior of the signals on this interface are described in Answer Record 54350 .

Table 2-16: FRAME_ECC Interface Signals

Name

Sense

I/O

Description

fecc_crcerr

HIGH

I

Receives CRCERROR output of FRAME_ECC.

fecc_eccerr

HIGH

I

Receives ECCERROR output of FRAME_ECC.

fecc_eccerrsingle

HIGH

I

Receives ECCERRORSINGLE output of FRAME_ECC.

fecc_syndromevalid

HIGH

I

Receives SYNDROMEVALID output of FRAME_ECC.

fecc_syndrome[12:0]

HIGH

I

Receives SYNDROME output of FRAME_ECC.

fecc_far[25:0]

HIGH

I

Receives FAR output of FRAME_ECC.

fecc_synbit[4:0]

HIGH

I

Receives SYNBIT output of FRAME_ECC.

fecc_synword[6:0]

HIGH

I

Receives SYNWORD output of FRAME_ECC.