The Video In to AXI4-Stream core is easily configured to meet the developer's specific needs through the Vivado Design Suite. This section provides a quick reference to parameters that can be configured at generation time.
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X-Ref Target - Figure 4-1 
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The GUI displays a representation of the IP symbol on the left side, and the parameter assignments on the right side, which are described as follows:
• Component Name : The component name is used as the base name of output files generated for the module. Names must begin with a letter and must be composed of characters: a to z, 0 to 9 and “_”.
• Pixels Per Clock : Specifies the number of pixels to be output in parallel. This parameter affects the data bus width of the input and output. The options for pixels per clock are 1, 2, or 4.
• Video Format : Specifies the video format used. The video formats are specified in the Video IP: AXI Feature Adoption section of the Vivado AXI Reference Guide (UG1037) [Ref 4] . The format selected determines the number of components used. The number of components (1-4) is multiplied by pixels per clock and the component width to determine the width of the video data bus, v_data . In turn, this width is rounded up to the nearest factor of 8 to determine the width of the AXI4-Stream data bus, m_axis_video_tdata . For example, if the component width is 14, pixels per clock is 2, and the Video Format is RGB (3 components), the vid_data is 84 bits wide and m_axis_video_tdata is 88 bits. When using IP integrator, this parameter is automatically computed based on the Video Format of the video IP core connected to the slave AXI4-Stream video interface.
• Native Video Input Component Width : Specifies the video component bit width over the input video data bus .
• AXI4S Video Output Component Width : Specifies the video component bit width over the output AXI4-Stream TDATA bus.
• FIFO Depth : Specifies the number of locations in the input FIFO. The options for FIFO depth are 32, 1024, 2048, 4096, and 8192.
• Clock Mode : The clock mode is used to specify whether the AXI4-Stream output and Video input signals are clocked using common or independent clocks.