To support standard definition video input such as PAL and NTSC, the Video In to AXI4-Stream core supports interlace on the video (with timing) side, the video input has a vid_field_id bit as part of its interface and embedded vertical blanks and horizontal blanks. The VTC has a corresponding vid_field_id pin defined for this purpose.
This Figure shows the interfaces on Video In to AXI4-Stream, AXI4-Stream to Video Out, and VTC cores to support the video field ID with the interlace-related signals highlighted in red.
Most video processing cores are field-agnostic, and not aware of whether the picture being processed is an odd or even frame, or a progressive field. Therefore, interlace has no impact on these cores. The Video In to AXI4-Stream core has a frame ID output, fid , timed to the AXI4-Stream bus. This signal can be used as needed in the system. Some cores that use this fid bit are the AXI4-Stream to Video Out, VDMA, and Video Deinterlacer cores.
The AXI4-Stream to Video Out core has a field ID input, fid , sampled in time with the AXI4-Stream input bus. This fid bit must be asserted by the upstream source of AXI4-Stream video. For systems without a frame buffer or deinterlacing, the field ID input originates from the Video In core, as shown in This Figure .
For systems with a frame buffer, the field ID input can come from any core containing a frame buffer. The field ID from the Video In to AXI4-Stream core can be used by the frame buffer if necessary, shown in This Figure .
Note: In This Figure , the AXI4-Stream to Video Out core is operating in slave mode.
A deinterlacer can be used after the Video In to AXI4-Stream core to convert the video format from interlaced to progressive. In this case, the deinterlacer uses the field ID bit, fid , from the Video In to AXI4-Stream core, as shown in This Figure .
On the Video In to AXI4-Stream core, the fid bit changes coincident with SOF and remains constant throughout the remainder of the field. On the AXI4-Stream to Video Out core, the fid bit is sampled coincident with SOF in This Figure . Therefore, the Video In to AXI4-Stream can provide the field bit directly to the AXI4-Stream to Video Out core if no intervening frame buffer exists. When a deinterlacer or frame buffer is used, a similar scheme can be employed: generate the field ID coincident with the start of the field, and on the receiving side sample the field ID coincident with the first received pixel.
